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Analysis of institutional authors

Yuste Borja, EvaAuthorGonzalez Brito, CesarAuthorRuiz González, MarianoAuthorCarpeÑo Ruiz, AntonioAuthorPiÑas Higueruela, AlejandroAuthorCosta Perez, VictorAuthorNieto Valhondo, JulianAuthorBarrera López De Turiso, EduardoAuthor
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Paper

Integration of Hardware Acceleration Techniques in Real-Time Framework using FPGA devices

Publicated to:24th IEEE REAL TIME CONFERENCE (Quy Nhon. Vietnam. 2024) - 2024-04-22 (), DOI:

Authors: C. González, M. Ruiz, A. Carpeño, A. Piñas , V. Costa, J. Nieto, E. Barrera

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Quality index

Leadership analysis of institutional authors

This work has been carried out with international collaboration, specifically with researchers from: Vietnam.

There is a significant leadership presence as some of the institution’s authors appear as the first or last signer, detailed as follows: First Author (GONZALEZ BRITO, CESAR) and Last Author (Yuste Borja, Eva).