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This work was partially supported by the Spanish Ministry of Economy and Competitiveness under the project REBECCA (Reference TEC2014-58036-C4-2-R), and the FPI grant program of said Ministry (Grant No. BES-2012-060459). The LUT-based PEs were originally developed in collaboration with Ing. Roland Dobai, Ph.D., from Brno University of Technology.

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Mora, JavierCorresponding AuthorSalvador, RubenAuthorDe La Torre, EduardoAuthor

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On the scalability of evolvable hardware architectures: comparison of systolic array and Cartesian genetic programming

Publicated to:Genetic Programming And Evolvable Machines. 20 (2): 155-186 - 2019-06-01 20(2), DOI: 10.1007/s10710-018-9340-5

Authors: Mora, Javier; Salvador, Ruben; de la Torre, Eduardo;

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Abstract

Evolvable hardware allows the generation ofcircuits that areadapted to specific problems by using an evolutionary algorithm (EA). Dynamic partial reconfiguration of FPGA LUTs allows making the processing elements (PEs) of these circuits small and compact, thus allowing large scale circuits to be implemented in a small FPGA area. This facilitates the use of these techniques in embedded systems with limited resources. The improvement on resource-efficient implementation techniques has allowed increasing the size of processing architectures from a few PEs to several hundreds. However, these large sizes pose new challenges for the EA and the architecture, which may not be able to take full advantage of the computing capabilities of its PEs. In this article, two different topologiessystolic array (SA) and Cartesian genetic programming (CGP)are scaled from small to large sizes and analyzed, comparing their behavior and efficiency at different sizes. Additionally, improvements on SA connectivity are studied. Experimental results show that, in general, SA is considerably more resource-efficient than CGP, needing up to 60% fewer FPGA resources (LUTs) for a solution with similar performance, since the LUT usage per PE is 5 times smaller. Specifically, 10 x 10 SA has better performance than 5 x 10 CGP, but uses 50% fewer resources.

Keywords

Cartesian genetic programmingCircuitsDynamic partial reconfigurationEvolvable hardwareFpgaImplementationScalabilitySystolic array

Quality index

Bibliometric impact. Analysis of the contribution and dissemination channel

The work has been published in the journal Genetic Programming And Evolvable Machines due to its progression and the good impact it has achieved in recent years, according to the agency WoS (JCR), it has become a reference in its field. In the year of publication of the work, 2019, it was in position 41/108, thus managing to position itself as a Q2 (Segundo Cuartil), in the category Computer Science, Theory & Methods. Notably, the journal is positioned en el Cuartil Q3 para la agencia Scopus (SJR) en la categoría Hardware and Architecture.

From a relative perspective, and based on the normalized impact indicator calculated from the Field Citation Ratio (FCR) of the Dimensions source, it yields a value of: 2.08, which indicates that, compared to works in the same discipline and in the same year of publication, it ranks as a work cited above average. (source consulted: Dimensions Jun 2025)

Specifically, and according to different indexing agencies, this work has accumulated citations as of 2025-06-03, the following number of citations:

  • WoS: 2
  • Scopus: 9
  • OpenCitations: 9

Impact and social visibility

From the perspective of influence or social adoption, and based on metrics associated with mentions and interactions provided by agencies specializing in calculating the so-called "Alternative or Social Metrics," we can highlight as of 2025-06-03:

  • The use of this contribution in bookmarks, code forks, additions to favorite lists for recurrent reading, as well as general views, indicates that someone is using the publication as a basis for their current work. This may be a notable indicator of future more formal and academic citations. This claim is supported by the result of the "Capture" indicator, which yields a total of: 19 (PlumX).

Leadership analysis of institutional authors

There is a significant leadership presence as some of the institution’s authors appear as the first or last signer, detailed as follows: First Author (MORA DE SAMBRICIO, JAVIER) and Last Author (TORRE ARNANZ, EDUARDO DE LA).

the author responsible for correspondence tasks has been MORA DE SAMBRICIO, JAVIER.